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Teaching Computer Architecture by Designing and Simulating Processors From Their Bits and Bytes

dc.contributor.author Dogan, Mustafa
dc.contributor.author Oztoprak, Kasim
dc.contributor.author Tolun, Mehmet Resit
dc.date.accessioned 2025-05-11T17:05:09Z
dc.date.available 2025-05-11T17:05:09Z
dc.date.issued 2024
dc.description Oztoprak, Kasim/0000-0003-2483-8070; Dogan, Mustafa/0009-0005-2591-783X en_US
dc.description.abstract Teaching computer architecture (Comp-Arch) courses in undergraduate curricula is becoming more of a challenge as most students prefer software-oriented courses. In some computer science/engineering departments, Comp-Arch courses are offered without the lab component due to resource constraints and differing pedagogical priorities. This article demonstrates how students working in teams are motivated to study the Comp-Arch course and how instructors can increase student motivation and knowledge by taking advantage of hands-on practices. The teams are asked to design and implement a 16-bit MIPS-like processor with constraints as a specific instruction set, and limited data and instruction memory. Student projects include following three phases, namely, design, desktop simulator implementation, and verification using hardware description language (HDL). In the design phase, teams develop their Comp-Arch to implement specified instructions. A range of designs resulted, e.g., (a) a processor with extensive user-defined instructions resulting in longer cycle times (b) a processor with a minimal instruction set but with a faster clock cycle time. Next, teams developed a desktop simulator in any programming language to execute instructions on the architecture. Finally, students engage in Verilog Hardware Description Language (HDL) projects to simulate and verify the data-path designed during the initial phase. Student feedback and their current understanding of the project were collected through a questionnaire featuring varying Likert scale questions, some with a ten-point scale, and others with a five- point scale. Results of the survey show that the hands-on approach increases students' motivation and knowledge in the Comp-Arch course, which is centered around computer system design principles. This approach can also be effectively extended to related courses, such as Microprocessor Design, which delves into the intricacies of creating and implementing microprocessors or central processing units (CPUs) at the hardware level. Furthermore, the present study demonstrates that interactions, specifically through peer reviews and public presentations, between students in each phase increases their knowledge and perspective on designing custom processors. en_US
dc.identifier.doi 10.7717/peerj-cs.1818
dc.identifier.issn 2376-5992
dc.identifier.scopus 2-s2.0-85186908948
dc.identifier.uri https://doi.org/10.7717/peerj-cs.1818
dc.identifier.uri https://hdl.handle.net/20.500.12416/9647
dc.language.iso en en_US
dc.publisher Peerj inc en_US
dc.relation.ispartof PeerJ Computer Science
dc.rights info:eu-repo/semantics/openAccess en_US
dc.subject Processor Design en_US
dc.subject Processor Simulator Development en_US
dc.subject Hdl Implementation en_US
dc.subject Computer Architecture en_US
dc.subject Integrated Circuit en_US
dc.subject Hardware Validation en_US
dc.subject Visualization en_US
dc.title Teaching Computer Architecture by Designing and Simulating Processors From Their Bits and Bytes en_US
dc.type Article en_US
dspace.entity.type Publication
gdc.author.id Oztoprak, Kasim/0000-0003-2483-8070
gdc.author.id Dogan, Mustafa/0009-0005-2591-783X
gdc.author.scopusid 58719105800
gdc.author.scopusid 21743623400
gdc.author.scopusid 6603446979
gdc.author.wosid Tolun, Mehmet/Kcj-5958-2024
gdc.author.wosid Oztoprak, Kasim/U-1631-2018
gdc.bip.impulseclass C5
gdc.bip.influenceclass C5
gdc.bip.popularityclass C4
gdc.coar.access open access
gdc.coar.type text::journal::journal article
gdc.collaboration.industrial true
gdc.description.department Çankaya University en_US
gdc.description.departmenttemp [Dogan, Mustafa] ASELSAN Res, Ankara, Turkiye; [Dogan, Mustafa] Hacettepe Univ, Dept Comp Engn, Ankara, Turkiye; [Oztoprak, Kasim] Konya Food & Agr Univ, Dept Comp Engn, Konya, Turkiye; [Tolun, Mehmet Resit] Cankaya Univ, Dept Software Engn, Ankara, Turkiye en_US
gdc.description.publicationcategory Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı en_US
gdc.description.scopusquality Q1
gdc.description.startpage e1818
gdc.description.volume 10 en_US
gdc.description.woscitationindex Science Citation Index Expanded
gdc.description.wosquality Q2
gdc.identifier.openalex W4391928255
gdc.identifier.pmid 38435576
gdc.identifier.wos WOS:001176948800002
gdc.index.type WoS
gdc.index.type Scopus
gdc.index.type PubMed
gdc.oaire.accesstype GOLD
gdc.oaire.diamondjournal false
gdc.oaire.impulse 2.0
gdc.oaire.influence 3.0601273E-9
gdc.oaire.isgreen true
gdc.oaire.keywords Integrated circuit
gdc.oaire.keywords QA75.5-76.95
gdc.oaire.keywords Hardware validation
gdc.oaire.keywords Computer Architecture
gdc.oaire.keywords Electronic computers. Computer science
gdc.oaire.keywords HDL implementation
gdc.oaire.keywords Computer architecture
gdc.oaire.keywords Processor simulator development
gdc.oaire.keywords Processor design
gdc.oaire.popularity 4.0913513E-9
gdc.oaire.publicfunded false
gdc.oaire.sciencefields 05 social sciences
gdc.oaire.sciencefields 02 engineering and technology
gdc.oaire.sciencefields 0202 electrical engineering, electronic engineering, information engineering
gdc.oaire.sciencefields 0503 education
gdc.openalex.collaboration National
gdc.openalex.fwci 1.3531
gdc.openalex.normalizedpercentile 0.82
gdc.opencitations.count 0
gdc.plumx.mendeley 20
gdc.plumx.newscount 1
gdc.plumx.scopuscites 2
gdc.scopus.citedcount 4
gdc.virtual.author Tolun, Mehmet Reşit
gdc.wos.citedcount 1
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